1. Field of the Invention
The present invention relates to a method for manufacturing a bonded substrate by bonding a first semiconductor substrate onto a second semiconductor substrate via an oxide film therebetween, or without the oxide film therebetween. More in detail, the present invention relates to a method suitable for manufacturing an SOI (Silicon on Insulator) substrate when a silicon substrate is used for a semiconductor substrate.
2. Description of the Related Art
Conventionally, as a method for manufacturing a bonded substrate, there has been known a method for manufacturing a bonded substrate which uses a bonding method in which the first silicon substrate serving as an SOI layer is contacted closely onto a second silicon substrate serving as a support substrate via an oxide layer. In the methods for manufacturing the bonded substrate, there are an ion implantation separation method which is also called a smart-cut method; and a GB method (Grind Back), etc.
The above ion implantation separation method is a manufacturing method for obtaining the SOI substrate in which the SOI layer is formed on the second silicon substrate via the oxide film by forming a laminated body by bonding the first silicon substrate into which hydrogen ions or rare gas ions are implanted onto the second silicon substrate via the oxide film; by maintaining this laminated body in a thermal treatment furnace at a predetermined temperature; and separating the first silicon substrate in an ion implantation area.
On the other hand, the GB method is a manufacturing method for obtaining the SOI substrate in which the SOI layer is formed on the second silicon substrate via the oxide film by forming the laminated body by bonding the first silicon substrate onto the second silicon substrate via the oxide film; and forming a thin film by grinding the first silicon substrate from a primary surface of the first silicon substrate which does not contact the second silicon substrate after bonding the laminated body by thermal treatment.
However, in the SOI substrate manufactured by the above ion implantation separation method, surface roughness of the SOI layer which is a cleavage surface increases; therefore there has been a problem that crystal defect layer exists in an upper portion of the SOI layer due to the separation. Also, in the SOI substrate manufactured by the above GB method, there has been a problem that an innersurface film thickness is uneven in an entire SOI layer.
In order to solve these problems, there is disclosed a method for manufacturing the SOI substrate using a vapor-phase etching method which is called a PACE method (Plasma Assisted Chemical Etching) (for example, refer to Patent Reference 1).
The PACE method disclosed by the above patent reference is a method which is provided with a pair of electrodes disposed upwardly and downwardly so as to sandwich the SOI substrate; a high-frequency power supply for applying high frequency wave between these electrodes; and a cavity disposed to one of the electrodes so as to face the SOI substrate and to freely run on the SOI substrate where plasma localized in the cavity etches the SOI layer by this plasma. In order to etch the SOI layer by using this PACE method, thickness distribution of the SOI layer on the SOI substrate is measured at first, next the running speed of the cavity is controlled in accordance with this thickness distribution. This enables time to be controlled during which the SOI layer is exposed to the plasma; therefore, it is possible to form the thickness of the SOI layer uniformly while the crystal defect layer on the surface of the SOI layer is removed.
[Patent Reference 1] Japanese Unexamined Patent Application, First Publication No. H11-102848 (claim 1, paragraph [0016], paragraph [0021], paragraph [0030], FIG. 2))